| 2018 | A. Lottarini, A. Ramirez, J. Coburn, M. A. Kim, P. Ranganathan, D. Stodolsky, M. Wachsler. vbench: Benchmarking Video Transcoding in the Cloud. In Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2018. | |
| 2017 | T. J. Repetti, J. P. Cerqueira, M. A. Kim, M. Seok. Pipelining a Triggered Processing Element. In International Symposium on Microarchitecture (MICRO), November 2017. | |
| S. A. Edwards, R. Townsend, M. A. Kim. Compositional Dataflow Circuits. In ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE), November 2017. | |
| P. Chundi, Y. Zhou, M. A. Kim, E. Kursun, M. Seok. Hotspot Monitoring and Temperature Estimation with Miniature On-Chip Temperature Sensors. In International Symposium on Low Power Electronics and Design (ISLPED), August 2017. | |
| A. Lottarini, S. A. Edwards, K. A. Ross, M. A. Kim. Network Synthesis for Database Processing Units. In Design Automation Conference (DAC), July 2017. | |
| B. Cao, K. A. Ross, S. A. Edwards, M. A. Kim. Deadlock-Free Joins in DB-Mesh, an Asynchronous Systolic Array Accelerator. In Workshop on Data Management on New Hardware (DaMoN), June 2017. | |
| R. Townsend, M. A. Kim, S. A. Edwards. From Functional Programs to Pipelined Dataflow Circuits. In International Conference on Compiler Construction (CC), pages 76 -- 86, March 2017. | |
| 2016 | M. Kambadur, M. A. Kim. NRG-Loops: Conditionally Adjusting Applications to Conserve Power and Energy. In International Symposium on Code Generation and Optimization (CGO), pages 206 -- 215, April 2016. | |
| 2015 | K. Zhai, R. Townsend, L. Lairmore, M. A. Kim, S. A. Edwards. Hardware Synthesis from a Recursive Functional Language. In International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 83 -- 93, November 2015. | |
| M. Kambadur, S. Hong, J. Cabral, H. Patil, C. Luk, S. Sajid, M. A. Kim. Fast Computational GPU Design with GT-Pin. In International Symposium on Workload Characterization (IISWC), pages 76 -- 86, November 2015. | |
| B. Cao, K. A. Ross, M. A. Kim, S. A. Edwards. Implementing Latency-Insensitive Dataflow Blocks. In ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE), pages 179 -- 187, October 2015. | |
| L. Wu, A. Lottarini, T. Paine, M. A. Kim, K. A. Ross. The Q100 Database Processing Unit. In IEEE Micro Top Picks in Computer Architecture (TopPicks), 34(3): pages 109 -- 119, May/June 2015. | |
| M. A. Kim. Better Architecture. In MIT Technology Review (TR), | |
| 2014 | M. Kambadur, M. A. Kim. An Experimental Survey of Energy Management Across the Stack. In International Conference on Object-Oriented Programming, Systems, Languages and Applications (OOPSLA), pages 329 -- 344, November 2014. | |
| L. Wu, O. Polychroniou, R. J. Barker, M. A. Kim, K. A. Ross. Energy Analysis of Hardware and Software Range Partitioning. In ACM Transactions on Computer Systems (TOCS), 32(3): pages 8:1 -- 8:24, September 2014. | |
| V. Bui, M. A. Kim. Caches and Codecs: An Analytical Model for the Storage and Manipulation of Data. In IEEE Micro: Special Issue on Big Data (IEEEMicro), 34(4): pages 28 -- 35, July/August 2014. | |
| L. Wu, R. J. Barker, M. A. Kim, K. A. Ross. Hardware Partitioning for Big Data Analytics. In IEEE Micro Top Picks in Computer Architecture (TopPicks), 34(3): pages 109 -- 119, May/June 2014. | |
| P. Mantovani, E. G. Cota, S. Kim, K. Tien, J. Chan, G. Di Guglielmo, C. Pilato, M. A. Kim, M. Seok, K. Shepard, L. P. Carloni. Benchmarking Methodology for Embedded Scalable Platforms. In DAC Suite of Embedded Applications and Kernels Workshop (SEAK), May 2014. | |
| R. Townsend, M. A. Kim, S. A. Edwards. Resource Allocation for Hardware Implementations of Map. In Workshop on Architectures and Systems for Big Data (ASBD), May 2014. | |
| M. Kambadur, M. A. Kim. Trading Functionality for Power within Applications. In SIGPLAN Workshop on Probabilistic and Approximate Computing (APPROX), April 2014. | |
| L. Wu, A. Lottarini, T. Paine, M. A. Kim, K. A. Ross. Q100: The Architecture and Design of a Database Processing Unit. In Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 255 -- 268, April 2014. Top Picks in Computer Architecture Selection. | |
| M. Kambadur, K. Tang, M. A. Kim. ParaShares: Finding the Important Basic Blocks in Multithreaded Programs. In International European Conference on Parallel Processing (Euro-Par), pages 75 -- 86, March 2014. | |
| 2013 | L. Wu, R. J. Barker, M. A. Kim, K. A. Ross. Navigating Big Data with High-Throughput, Energy-Efficient Data Partitioning. In International Symposium on Computer Architecture (ISCA), pages 249 -- 260, July 2013. Top Picks in Computer Architecture Selection. | |
| M. Kambadur, K. Tang, M. A. Kim. Collection, Analysis, and Uses of Parallel Block Vectors. In IEEE Micro Top Picks in Computer Architecture (TopPicks), 33(3): pages 86 -- 94, May/June 2013. | |
| 2012 | M. Kambadur, K. Tang, J. Lopez, M. A. Kim. Parallel Scaling Properties from a Basic Block View. In ACM SIGMETRICS (Poster) (SIGMETRICS-Poster), December 2012. | |
| M. Kambadur, K. Tang, M. A. Kim. Harmony: Collection and Analysis of Parallel Block Vectors. In International Symposium on Computer Architecture (ISCA), pages 452 -- 463, July 2012. Top Picks in Computer Architecture Selection. | |
| M. Kambadur, T. Moseley, R. Hank, M. A. Kim. Measuring Interference Between Live Datacenter Applications. In International Conference on Supercomputing (SC), pages 51 -- 63, June 2012. | |
| L. Wu, M. A. Kim. Acceleration Targets: A Study of Popular Benchmark Suites. In Dark Silicon Workshop (DaSi), May 2012. | |
| L. Wu, M. A. Kim, S. A. Edwards. Cache Impacts of Datatype Acceleration. In Computer Architecture Letters (CAL), 11(1): pages 21 -- 24, January-June 2012. Best of CAL 2011; CAL Spotlight Paper. | |
| 2011 | M. A. Kim. Stories, not Words: Abstract Datatype Processors. In Workshop on New Directions in Computer Architecture (NDCA), July 2011. Invited submission to CAL. | |
| 2010 | M. Oskin, J. Torrelas, Et. al.. Laying a New Foundation for IT: Computer Architecture for 2025 and Beyond. In Workshop on Advancing Computer Architecture Research (ACAR-II), | |
| M. A. Kim, S. A. Edwards. Computation vs. Memory Systems: Pinning Down Accelerator Bottlenecks. In Workshop on Architectural and Microarchitectural Support for Binary Translation (AMAS-BT), July 2010. | |
| 2008 | M. Mercaldi Kim, J. D. Davis, M. Oskin, T. Austin. Polymorphic On-Chip Networks. In International Symposium on Computer Architecture (ISCA), pages 101 -- 112, July 2008. | |
| 2007 | M. Mercaldi Kim, M. Mehrara, M. Oskin, T. Austin. Architectural Implications of Brick and Mortar Silicon Manufacturing. In International Symposium on Computer Architecture (ISCA), pages 244 -- 253, July 2007. | |
| S. Swanson, A. Schwerin, M. Mercaldi, A. Petersen, A. Putnam, K. Michelson, M. Oskin, S. J. Eggers. The WaveScalar Architecture. In ACM Transactions on Computer Systems (TOCS), 25(2): pages 1 -- 54, June 2007. | |
| 2006 | M. Mercaldi, S. Swanson, A. Petersen, A. Putnam, A. Schwerin, M. Oskin, S. J. Eggers. Instruction Scheduling for a Tiled Dataflow Architecture. In Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 141 -- 150, November 2006. | |
| A. Petersen, A. Putnam, M. Mercaldi, A. Schwerin, S. Swanson, S. J. Eggers, M. Oskin. Reducing Control Overhead in Dataflow Architectures. In Conference on Parallel Architectures and Compilation Techniques (PACT), pages 182 -- 191, October 2006. | |
| M. Mercaldi, S. Swanson, A. Petersen, A. Putnam, A. Schwerin, M. Oskin, S. J. Eggers. Modeling Instruction Placement on a Spatial Architecture. In Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pages 158 -- 169, August 2006. | |
| M. G. Kostoulas, M. Matsa, N. Mendelsohn, E. Perkins, A. Heifets, M. Mercaldi. XML Screamer: An Integrated Approach to High Performance XML Parsing, Validation and Deserialization. In International Conference on World Wide Web (WWW), pages 93 -- 102, July 2006. Best Paper Nominee. | |
| S. Swanson, A. Putnam, M. Mercaldi, A. Petersen, A. Schwerin, M. Oskin, S. J. Eggers. Area-Performance Trade-offs in Tiled Dataflow Architectures. In International Symposium on Computer Architecture (ISCA), pages 314 -- 326, July 2006. | |