This research project examines the design and deployment of specialized processors to improve the throughput and energy efficiency of large-scale data processing. In particular, our focus is on relational database query processing and the design of a database processing unit or DPU. Like GPUs, DPUs are domain-specific processors which can support a range of database oriented computations. Our first DPU design focuses on analytic queries of large data sets.
|L. Wu, R. J. Barker, M. A. Kim, K. A. Ross. Hardware Partitioning for Big Data Analytics. In IEEE Micro: Top Picks from Computer Architecture Conferences (Top Picks), 34(3): pages 109 -- 119, May/June 2014.|
|L. Wu, A. Lottarini, T. Paine, M. A. Kim, K. A. Ross. Q100: The Architecture and Design of a Database Processing Unit. To appear in IEEE Micro: Top Picks from Computer Architecture Conferences (Top Picks), May/June 2015.|
|L. Wu, A. Lottarini, T. Paine, M. A. Kim, K. A. Ross. Q100: The Architecture and Design of a Database Processing Unit. In the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2014. Top Picks in Computer Architecture Selection.|
|L. Wu, R. J. Barker, M. A. Kim, K. A. Ross. Navigating Big Data with High-Throughput, Energy-Efficient Data Partitioning. In the International Symposium on Computer Architecture (ISCA), pages 249 -- 260, June 2013. Top Picks in Computer Architecture Selection.|
This material is based upon work supported by the National Science Foundation under Grant No. CCF-1065338, Intel Corporation, and C-FAR, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of these sponsors.